Rung Divisions

Input

Clock

Reset

{{ runLabel }}

{{ rateLabel }}

Audio rate

Divisions → Bus routing

click to cycle

{{ d.label }}

{{ d.busLabel }}

Universal shift register

{{ b.digit }}

Length

{{ lengthValue }}

Chance

{{ chanceValue }}

{{ dirGlyph }}Direction

Write

{{ w.label }}

Data

{{ m.label }}

Outputs

Bus 1

Bus 2

1‑bit

3‑bit

{{ dac3Value }}

8‑bit

{{ dac8Value }}

reverse‑encoded